1. Field of the Invention
The present invention relates to a code converter which is used for converting a unipolar binary coded signal into a bipolar binary coded signal, and more particularly, to a device which is intended to curtail the expansion of a circuit on a large scale, and stabilize the operation of the circuit.
2. Description of the Related Art
When digital signal processing occurs in a digital form, such as digital filtering of analog signal inputs, after a conversion from an analog signal to a digital signal has been carried out by an analog-to-digital converter, each type of digital processing is effected.
In general, a digital signal output from an analog-to-digital converter is output as a unipolar binary coded signal which represents an absolute value of an analog input signal. However, since there are many cases where a bipolar binary-coded signal having polarity information is used to effect digital signal processing as input information, a code converter is utilized in which an output of an analog-to-digital converter is converted into a bipolar binary-coded signal.
In such a prior art code converter an input signal and a reference signal are compared in order to be divided into a first half cycle and a second half cycle, and after a twos-complement conversion is carried out with respect to one half cycle, the constitution of the converter is such that the resultant signals are combined to form a bipolar binary-coded signal. As a result, the structure of a circuit such as a comparator, and an adder-subtracter, a twos-complement computing element and the like always becomes large scale in relation to the quantized accuracy of the input signals, and the problems of increased manufacturing costs still remain.
In all kinds of data acquisition apparatus formed by conventional types of code converters, such as an encoder device for producing composite picture signals in a picture processing system, the same increased cost problem occurs.
In view of these problems, the present invention has been devised.
In accordance with the present invention, a reference voltage extracted from an input signal is converted into a twos-complement value and then a bipolar binary-coded signal is produced by the addition of the above twos-complement value and the input signal.
Therefore, since it is not necessary to discriminate a half cycle of the input signal, it is unnecessary to provide a comparator. Also, since it is preferable to effect conversion processing into the twos-complement value for the reference voltage only once (it is not necessary to effect the above processing for every quantization unit), this processing is simplified. As a result, as it is intended to decrease the scale of each constituent part, a bipolar binary-coded signal can be produced at the same time.
For example, when applied to an encoder, it is obvious that the scale of the circuitry of the encoder can be reduced, so it can be realized at a lower cost.